[postdoc] neuromorphic architectures

Contact

BISCUIT team, Loria
Supervision: Bernard Girau (HDR)
Bernard.Girau@loria.fr

Summary

Dynamic neural fields (DNF) are bio-inspired models of (usually 2D) neural populations at a mesoscopic scale, where neural units continuously interact through excitatory and inhibitory connections. DNF have been applied to visual attention, novelty detection, face recognition, robot control, etc. In the context of hardware digital implementation of DNF on FPGAs, spiking versions of DNF have been defined, showing similar behavioral properties with an improved robustness to noise and distractors.

This post-doctorate proposal first aims to study how spiking versions of dynamic neural fields can be implemented on neuromorphic circuits that have emerged recently, such as the Intel Loihi architecture [1], in terms of computation and communication. The main illustrative application will be to track targets in a visual scene captured by a DVS spiking camera. The question of the implementation of neural architectures with several neural fields connected to each other will also be addressed, with applications to visual attention and visual memory. Finally, on the basis of a spiking version of self-organizing maps (SOM) under study, an additional objective will be the evaluation of the capacity of this model, which uses local learning rules, to be mapped onto neuromorphic chips.

This work will be carried out within the framework of the RV2.133.Girau project approved by the INRC (Intel Neuromorphic Research Community), which provides access to information on the design of the prototype Intel Loihi circuit and to the associated simulation software tools.

Description

The goal of this project is to extend our work on DNF to digital neuromorphic circuits, and more particularly to the Loihi architecture from Intel which offers both the type of computation that we use in our spiking DNF models and the versatility we need when developing new variants of DNF. The first part of the job will be to define and analyze a DNF model where each neural unit uses the exact type of spike-based computation that can be implemented in the neuromorphic cores of a Loihi circuit. A behavioral validation of this model is necessary, with a detailed evaluation of its ability to select a target and to induce an emerging competition within a set of possible targets, in the presence of an increasing level of noise and distractors. The second part of the work will address the issue of communication of neurons, within and between neuromorphic cores, knowing that the interconnection pattern of a DNF rapidly induces communication bottlenecks as the size of the DNF increases. The cellular solutions we have proposed constitute a possible solution to communication problems, using local random propagation of spikes [2] or stochastic binary streams [3]. Each adaptation of the DNF computational model to the Loihi architecture will have to be evaluated mainly through a behavioral analysis and through a comparison in terms of speed and scalability with implementations on CPU and FPGA. The third part of the work will address the question of the connection of several DNFs to implement more complex neural field architectures, such as those used for visual memory. In particular, it will be necessary to determine an efficient way to implement multiple afferent connections related to a neural map on the Loihi architecture. Finally, a prospective part of the proposed work is linked to the recent definition of a spiking model of self-organizing map, that we want to adapt to the Loihi architecture, in particular by using simple local learning mechanisms (based on STDP, spike timing dependent plasticity) that are present on the Loihi chip and used by our spiking SOM model.

Required Skills

The candidate must have the equivalent of a PhD in computer science, preferably on a subject related to artificial intelligence, neural networks and / or distributed digital computing. Since most of the work uses simulation software tools, experienced skills in software engineering are required, but knowledge of digital circuit design will also be taken into account. The candidate must be fluent in English and / or French.

Bibliography

[1]  A. Lines, P. Joshi, R. Liu, S. McCoy, J. Tse, Y. Weng, and M. Davies. Loihi asynchronous neuromorphic research chip. In 2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 2018.

[2]  Benoît Chappet De Vangel, Cesar Torres-Huitzil, and Bernard Girau. Randomly spiking dynamic neural fields. Journal of Emerging Technologies in Computing Systems, 2014.

[3]  Benoît Chappet De Vangel and Bernard Girau. Stochastic and asynchronous spiking dynamic neural fields. In International Joint Conference on Neural Networks, 2015 International Joint Conference on Neural Networks, IJCNN 2015, Killarney, Ireland, July 2015.

 

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